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3.2.67. c11, PLE Context ID Register

The PLE Context ID Register for each channel contains the processor context ID of the process that uses that channel.

The PLE Context ID Register is:

  • a read/write register for each PLE channel common to Secure and Nonsecure states

  • accessible in privileged modes only.

Figure 3.60 shows the bit arrangement of the PLE Context ID Register.

Figure 3.60. PLE Context ID Register format

Figure 3.60. PLE Context ID Register format

Table 3.134 shows how the bit values correspond with the PLE Context ID Register functions.

Table 3.134. PLE Context ID Register bit functions
[31:8]PROCIDExtends the ASID to form the process ID and identifies the current process

Holds the ASID of the current process and identifies the current ASID

Access in the Nonsecure state depends on the PLE bit, see c1, Nonsecure Access Control Register. Table 3.135 shows the results of attempted access for each mode.

Table 3.135. Results of access to the PLE Context ID Register[56]
 Secure privilegedNonsecure privilegedSecure UserNonsecure User
PLE bitReadWriteReadWriteReadWriteReadWrite

[56] An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.

To access the PLE Context ID Register in a privileged mode, set the PLE Channel Number Register to the appropriate PLE channel and read or write CP15 with:

MRC p15, 0, <Rd>, c11, c15, 0 ; Read PLE Context ID Register
MCR p15, 0, <Rd>, c11, c15, 0 ; Write PLE Context ID Register