The CTICHGATE Register is a read/write register that controls the propagation of events to the channel interface. Figure 15.14 shows the bit arrangement of the CTICHGATE Register.
Table 15.14 shows how the bit values correspond with the CTICHGATE Register functions.
Reserved. RAZ, SBZ.
|Enable CTICHOUT3. Set to 0 to disable channel propagation.|
Enable CTICHOUT2. Set to 0 to disable channel propagation.
Enable CTICHOUT1. Set to 0 to disable channel propagation.
Enable CTICHOUT0. Set to 0 to disable channel propagation.
The Channel Gate Register prevents events from propagating through the channel interface to other CTIs. This enables local cross-triggering, such as causing an interrupt when the ETM trigger occurs. You can use the CTICHGATE Register with the CTIAPPSET, CTIAPPCLEAR and CTIAPPPULSE Registers to assert trigger outputs by asserting channels, without affecting the rest of the system.
This register is set to
0xF on reset, this
causes channel interface propagation to be enabled for all channels.
See Figure 15.2 for more information.