These registers are read/write registers that define which channel can generate a CTITRIGOUT output. There is one register for each of the nine CTITRIGOUT outputs. Within each register there is one bit for each of the four channels implemented. These registers affect the mapping from application trigger to trigger outputs.
Figure 15.10 shows the bit assignments of these registers.
Table 15.10 shows how the bit values correspond with these registers.
Reserved. RAZ, SBZ.
Enables a channel event for the corresponding channel to generate an CTITRIGOUT output:
0 = the channel input CTICHIN from the CTM is not routed to the CTITRIGOUT output
1 = the channel input CTICHIN from the CTM is routed to the CTITRIGOUT output.
There is one bit of the register for each of the four channels. For example, enabling bit  in Register CTIOUTEN0, enables CTICHIN to cause a trigger event on the CTITRIGOUT output.