The Debug ROM Address Register is a read-only register that returns a 32-bit Debug ROM Address Register value. This is the physical address that indicates where in memory a debug monitor can locate the debug bus ROM specified by the CoreSight™ multiprocessor trace and debug architecture. This ROM holds information about all the components in the debug bus. You can configure the address read in this register using DBGROMADDR[31:12] and DBGROMADDRV inputs. DBGROMADDRV must be tied off to 1 if DBGROMADDR[31:12] is tied off to a valid value.
The Debug ROM Address Register is:
in CP14 c0
a read-only register
accessible in User and privileged modes.
Figure 12.3 shows the bit arrangement of the Debug ROM Address Register.
Table 12.12 shows how the bit values correspond with the Debug ROM Address Register functions.
|Debug bus ROM physical address|
Indicates bits [31:12] of the debug bus ROM physical address.
Reserved. UNP, SBZP.
Reads b11 if DBGROMADDRV is set to 1, reads b00 otherwise. DBGROMADDRV must be set to 1 if DBGROMADDR[31:12] is set to a valid value.
To access the Debug ROM Address Register, read CP14 c0 with:
MRC p14, 0, <Rd>, c1, c0, 0 ; Read Debug ROM Address Register