The PMU can count the two ETM external outputs as additional events by using the CTI. You must configure the CTI to connect the ETM external outputs to the PMU.
Because the CTI is implemented in the ATCLK clock domain, the ETM events must be resynchronized to ATCLK and back to the core clock before the PMU can use it. If the ETM events are too close together, the resynchronization causes some events to be lost.
The CTI outputs are normally held several cycles while synchronization takes place. CTI supports edge-detection logic that enables the PMU to count one event per ETM event. ARM recommends that you enable edge-detection for the PMU CTI outputs.
You can use the ETM to qualify PMU events and then count them using the ETM counters or pass them back to the PMU to be counted. You can count the number of cache misses caused by a particular region of instruction addresses as follows:
Configure the ETM extended external input selectors to the PMU cache miss events you want to count.
Configure an address range comparator to the required instruction address region, with the exact match bit cleared to 0.
Configure the ETM external outputs as follows:
Event A is the extended external input selector.
Event B is the required address range comparator.
Function is A and B.
Select the PMU external inputs to be counted in the PMU.