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1. CTI CoreSight defined registers

The Cortex-A8 Technical Reference Manual contains an incorrect description of the Cross Trigger Interface (CTI) Device ID Register. The CoreSight CTI, as described in the CoreSight Components Technical Reference Manual, uses bits [4:0] of this register to specify an implementation defined number of multiplexing levels on the trigger inputs and outputs. The Cortex-A8 processor implementation has no multiplexing on its trigger inputs or outputs, and therefore bits [4:0] must be zero.

The following section replaces section 15.8.2 in the Cortex-A8 Technical Reference Manual.

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