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3.2.30. c1, Nonsecure Access Control Register

The purpose of the Nonsecure Access Control Register is to define the nonsecure access permission for:

  • coprocessors

  • internal PLE.


This register has no effect on nonsecure access permissions for the debug control coprocessor, CP14, or the system control coprocessor, CP15.

The Nonsecure Access Control Register is:

  • a read/write register in the Secure state

  • a read-only register in the Nonsecure state

  • only accessible in privileged modes.

Figure 3.25 shows the bit arrangement of the Nonsecure Access Control Register.

Figure 3.25. Nonsecure Access Control Register format

Figure 3.25. Nonsecure Access Control Register

Table 3.58 shows how the bit values correspond with the Nonsecure Access Control Register functions.

Table 3.58. Nonsecure Access Control Register bit functions






Reserved. UNP, SBZP.



Determines if an access to PLE registers is permitted in Nonsecure state:

0 = PLE registers cannot be used in Nonsecure state

1 = PLE registers can be accessed in both Secure and Nonsecure state.

Nonsecure translation tables are used for address translation when the PLE bit is set to 1.


Determines if lockable translation table entries can be allocated in Nonsecure state:

0 = lockable TLB entries cannot be allocated, reset

1 = lockable TLB entries can be allocated.


Determines if lockdown entries can be allocated within the L2 cache in Nonsecure state:

0 = entries cannot be allocated, reset value

1 = entries can be allocated.

If CL is set to 0, then any L2 cache lockdown operation takes an Undefined Instruction exception.

[15:14]-Reserved. UNP, SBZ.

Determines permission to access the given coprocessor in the Nonsecure state, <n> is the number of coprocessor from 0 to 13:

0 = secure access only, reset value

1 = secure or nonsecure access.

To access the Nonsecure Access Control Register, read or write CP15 with:

MRC p15, 0, <Rd>, c1, c1, 2 ; Read Nonsecure Access Control Register data
MCR p15, 0, <Rd>, c1, c1, 2 ; Write Nonsecure Access Control Register data

Table 3.59 shows the results of attempted access for each mode.

Table 3.59. Results of access to the Auxiliary Control Register[27]
Secure privilegedNonsecure privilegedSecure User Nonsecure User

[27] An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.