The purpose of the TLB Lockdown Registers is to control which of the fully-associative TLB entries to allocate on the next table walk. The TLB is normally allocated on a rotating basis. The oldest entry is always the next allocated.
You can configure the TLB Lockdown Registers to exclude a range of entries from the round-robin allocation scheme. You must use the TLB Lockdown Registers with the TLB preload operation. See c10, TLB preload operation for more information.
The TLB Lockdown Registers are:
read/write registers common to Secure and Nonsecure states
accessible in privileged modes only.
Figure 3.50 shows the bit arrangement of the Data and Instruction TLB Lockdown Registers.
Table 3.110 shows how the bit values correspond with the Data and Instruction TLB Lockdown Register functions.
|Base||Defines the offset from TLB entry 0 for which entries 0 to base - 1 are locked assuming P equals 1 during a hardware translation table walk.|
Specifies the entry where the next hardware translation table walk can place a TLB entry. The reset value is 0. Each hardware translation table walk increments the value of the Victim field.
|-||Reserved. UNP, SBZP.|
Determines if TLB entries allocated by subsequent translation table walks are not invalidated by the Invalidate TLB unlocked entries operation:
0 = allocated TLB entries are invalidated, reset value
1 = allocated TLB entries are not invalidated.
For the Data or Instruction TLB Lockdown Register:
Setting the P bit before a hardware translation table walk does not guarantee the locking down of an entry. The Base field must be set to the first unlocked entry. The Victim field must always be set to a value greater than or equal to the value of the Base field.
Table 3.111 shows the results of attempted access for each mode.
|Secure privileged||Nonsecure privileged||Secure User||Nonsecure User|
|TL bit value||Read||Write||Read||Write||Read||Write||Read||Write|
 An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.
To access the Data TLB Lockdown Register, read or write CP15 with:
MRC p15, 0, <Rd>, c10, c0, 0 ; Read Data TLB Lockdown Register
MCR p15, 0, <Rd>, c10, c0, 0 ; Write Data TLB Lockdown Register
To access the Instruction TLB Lockdown Register, read or write CP15 with:
MRC p15, 0, <Rd>, c10, c0, 1 ; Read Instruction TLB Lockdown Register
MCR p15, 0, <Rd>, c10, c0, 1 ; Write Instruction TLB Lockdown Register