The Lock Access Register is a write-only register that controls writes to the debug registers. The purpose of the Lock Access Register is to reduce the risk of accidental corruption to the contents of the debug registers. It does not prevent all accidental or malicious damage. Because the state of the Lock Access Register is in the debug power domain, it is not lost when the core powers down.
Figure 12.25 shows the bit arrangement of the Lock Access Register.
Table 12.40 shows how the bit values correspond with the Lock Access Register functions.
|Lock access control||Lock access control. To unlock the debug registers,
write a |
You can only access the Lock Access Register when the PADDR31 input is LOW. Writes are ignored when PADDR31 is HIGH.