The Lock Status Register is a read-only register that returns the current lock status of the debug registers.
Figure 12.26 shows the bit arrangement of the Lock Status Register.
Table 12.41 shows how the bit values correspond with the Lock Status Register functions.
32-bit access. Indicates that a 32-bit access is required to write the key to the Lock Access Register. This bit always reads 0.
0 = writes are permitted
1 = writes are ignored, reset value.
|Lock implemented bit|
Lock implemented bit. Indicates that the lock functionality is implemented. This bit always reads 1.
This lock has no effect on accesses initiated by the debugger. Therefore, if PADDR31 is HIGH, all the bits in this register read 0.