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11.2.2. Enabling sections of the core

Three Cortex-A8 signals control whether or not sections of the processor can update when MBISTMODE is asserted or when TESTMODE is asserted. These signals are:

  • TESTEGATE

  • TESTNGATE

  • TESTCGATE.

When either of these modes is asserted:

  • if the TESTEGATE signal is LOW, the flops within the ETM unit cannot be updated

  • if the TESTNGATE signal is LOW, the flops within the NEON unit cannot be updated

  • the rest of the flops within the Cortex-A8 core are not updated when the TESTCGATE signal is LOW.

If these signals are HIGH, then the flip-flops that they control are allowed to update. When both MBISTMODE and TESTMODE are negated, the values of the TESTEGATE, TESTNGATE, and TESTCGATE inputs are not used.