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1.9.5. r1p1-r2p0

The following changes have been made in this release:

  • ID Register values changed to reflect product revision status:

    Main ID Register


    FPSID Register


  • CLKSTOPREQ and CLKSTOPACK functionality added to stop and restart the processor clocks without relying on software to execute WFI instruction.

  • The SAFESHIFTRAM signal is replaced with the SAFESHIFTRAMIF, SAFESHIFTRAMLS, and SAFESHIFTRAML2 signals for ATPG test.

  • Intelligent Energy Management (IEM) multiple power domain support added.

  • 1-way and 4-way L2 tag bank removed.

  • 64KB and 2MB L2 cache sizes removed.

  • ETMPWRDWNREQ and ETMPWRDWNACK are no longer required because debug and the ETM use the same power domain. ETMPWRDWNREQ must be tied to 0. See Static or leakage power management for information on the supported Cortex-A8 power domain configurations.