The purpose of the Performance Counter SELection (PMNXSEL) Register is to select a Performance Monitor Count Register.
The PMNXSEL Register is:
a read/write register common to Secure and Nonsecure states
accessible as determined by c9, User Enable Register.
Figure 3.43 shows the bit arrangement of the PMNXSEL Register.
Table 3.92 shows how the bit values correspond with the PMNXSEL Register functions.
5'b00000 = selects counter 0
5'b00001 = selects counter 1
5'b00010 = selects counter 2
5'b00011 = selects counter 3.
Any values programmed in the PMNXSEL Register other than those specified in Table 3.92 are Unpredictable.
Table 3.93 shows the results of attempted access for each mode.
 An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.
To access the PMNXSEL Register, read or write CP15 with:
MRC p15, 0, <Rd>, c9, c12, 5; Read PMNXSEL Register
MCR p15, 0, <Rd>, c9, c12, 5; Write PMNXSEL Register