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1.3. Compliance

The Cortex-A9 processor implements the ARMv7-A architecture that includes the following features:

  • ARM Thumb®-2 32-bit instruction set architecture for overall code density comparable with Thumb and performance comparable with ARM instructions. See the ARM Architecture Reference Manual for details of both the ARM and Thumb instruction sets.

  • Thumb Execution Environment (ThumbEE) to enable execution environment acceleration. See the ARM Architecture Reference Manual for details of the ThumbEE instruction set.

  • Security Extensions architecture technology for enhanced security features. The Security Extensions architecture, its associated implementations, and supporting software, are commonly referred to as TrustZone. See Security extensions overview. See the ARM Reference Manual for details on how TrustZone works in the architecture.

  • Advanced SIMD architecture extension to accelerate the performance of multimedia applications such as 3-D graphics and image processing. The Advanced SIMD architecture extension, its associated implementations, and supporting software, are commonly referred to as NEON technology. See the ARM Architecture Reference Manual for details of the NEON technology.

    See the Cortex-A9 NEON Media Processing Engine Technical Reference Manual for implementation-specific information.

  • Vector Floating-Point v3 (VFPv3) architecture for floating-point computation that is compliant with the IEEE 754 standard. See the ARM Architecture Reference Manual for details of the VFPv3 subarchitecture.

    See the Cortex-A9 Floating-Point Unit Technical Reference Manual for implementation-specific information.

  • The processor implements the ARMv7 Debug architecture that includes support for TrustZone and CoreSight. The Cortex-A9 processor implements Baseline CP14, Extended CP14 debug access, and memory mapped access to the debug registers. See Chapter 10 Debug for more information.

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