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10.3.3. Effects of resets on debug registers


This is the debug logic reset signals. This signal must be asserted during a power-on reset sequence. Other reset signals, nCPURESET and nNEONRESET, if MPE is present, have no effect on the debug logic.

On a debug reset:

  • The debug state is unchanged. That is, DBGSCR.HALTED is unchanged.

  • The processor removes the pending halting debug events DBGDRCR.HaltReq.