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The Cortex-A9 processor has a single externally generated
global clock. Table A.1 shows
the clock and clock control signals.
Table A.1. Clock and clock control signals
See Clocking and resets.
|MAXCLKLATENCY[2:0]||I||Implementation-specific static value|
Controls dynamic clock gating delays.
pin is sampled during reset of the processor.
See Power Control Register.
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