The Cortex-A9 processor can have the following power domains:
Cortex-A9 processor logic cells
Cortex-A9 processor data engines
Cortex-A9 processor RAMs.
Figure 2.4 shows the power domains.
The FPU is part of the processor power domain. The FPU clock is based on the processor clock. There is static and dynamic high-level clock-gating. NEON SIMD data paths and logic are in a separate power domain, with dedicated clock and reset signals. There is static and dynamic high-level clock-gating.
When NEON is present, you can run FPU (non-SIMD) code without powering the SIMD part or clocking the SIMD part.