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4.3.24. Configuration Base Address Register

The Configuration Base Address Register characteristics are:

Purpose

Takes the physical base address value at reset.

Usage constraints

The Configuration Base Address Register is:

  • read/write in secure privileged modes

  • read-only in non-secure state

  • read-only in User mode.

Configurations

In Cortex-A9 uniprocessor implementations the base address is set to zero.

In Cortex-A9 MPCore implementations, the base address is reset to PERIPHBASE[31:13] so that software can determine the location of the private memory region.

Attributes

See the register summary in Table 4.15.

Figure 4.23 shows the Configuration Base Address Register bit assignments.

Figure 4.23. Configuration Base Address Register bit assignments

Figure 4.23. Configuration Base Address Register bit assignments

To access the Configuration Base Address Register, read or write the CP15 register with:

MRC p15,4,<Rd>,c15,c0,0; Read Configuration Base Address Register
MCR p15,4,<Rd>,c15,c0,0; Write Configuration Base Address Register
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