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9.4.2. IR scan chain and IR instructions

This section describes the JTAG-DP Instruction Register (IR), accessed through the IR scan chain.

JTAG Instruction Register (IR)


Holds the current DAP Controller instruction.


4 bits.

Operating mode

When in Shift-IR state, the shift section of the IR is selected as the serial path between TDI and TDO. At the Capture-IR state, the binary value b0001 is loaded into this shift section. This is shifted out, least significant bit first, during Shift-IR. As this happens, a new instruction is shifted in, least significant bit first. At the Update-IR state, the value in the shift section is loaded into the IR so it becomes the current instruction.

On debug logic reset, IDCODE becomes the current instruction, see JTAG Device ID Code Register (IDCODE).


Figure 9.4 shows the bit order of the Instruction Register.

Figure 9.4. JTAG Instruction Register bit order

Figure 9.4. JTAG Instruction Register bit order

This register is mandatory in the IEEE 1149.1 standard.

IR instructions

The description of the JTAG Instruction Register shows how a 4-bit instruction is transferred into the IR. This instruction determines the physical Data Register that the JTAG Data Register maps onto, as described in DR scan chain and DR registers. The standard IR instructions are listed in Table 9.1.

Unused IR instruction values select the Bypass register, described in JTAG Bypass Register (BYPASS).

Standard IR instructions

IR instruction value

JTAG-DP register

DR scan width

See section
b0xxx--Implementation-defined extensions to the IR instruction set
b1000ABORT35JTAG-DP Abort Register (ABORT)
b1010DPACC35JTAG DP / AP Access Registers (DPACC / APACC)
b1110IDCODE32JTAG Device ID Code Register (IDCODE)
b1111BYPASS1JTAG Bypass Register (BYPASS)

Implementation-defined extensions to the IR instruction set

The eight IR instructions b0000 to b0111 are reserved and not implemented. These registers are used for boundary scan.

The DAP-DP is not intended for use as the JTAG TAP controlling boundary scan.


  • If the IR register is set to an IR instruction value that is not implemented, or reserved, then the Bypass Register is selected.

  • The DAP-DP is not IEEE 1149.1 compliant. Table 9.2 shows that IR instruction EXTEST, SAMPLE, and PRELOAD are not implemented. These instructions are used for boundary scan. BYPASS is decoded for these instructions.

IR instructions not implemented for IEEE 1149.1 compliance
IR instruction valueInstructionRequired by IEEE 1149.1

JTAG Bypass Register (BYPASS)


Bypasses the device, by providing a direct path between TDI and TDO.


1 bit.

Operating mode

When the BYPASS instruction is the current instruction in the IR:

  • in the Shift-DR state, data is transferred from TDI to TDO with a delay of one TCK cycle

  • in the Capture-DR state, a logic 0 is loaded into this register

  • nothing happens at the Update-DR state.


Figure 9.5 shows the operation of the Bypass Register.

Figure 9.5. JTAG Bypass Register operation

Figure 9.5. JTAG Bypass Register operation

This register is mandatory in the IEEE 1149.1 standard.

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