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9.3.4. SWD and JTAG select mechanism

SWJ-DP enables either a SWD or JTAG protocol to be used on the debug port. To do this, it implements a watcher circuit that detects a specific 16-bit select sequence on the SWDIOTMS pin:

  • one 16-bit sequence is used to switch from JTAG to SWD operation

  • a different 16-bit sequence is used to switch from SWD to JTAG.

The switcher defaults to JTAG operation on power-on reset and therefore the JTAG protocol can be used from reset without sending a select sequence.

Switching from one protocol to the other can only occur when the selected interface is in its reset state. JTAG must be in its Test-Logic-Reset (TLR) state and SWD must be in line-reset.

SWJ-DP programmer's model

The SWJ-DP programmer’s model is described in:

JTAG to SWD switching

To switch SWJ-DP from JTAG to SWD operation:

  • Send more than 50 SWCLKTCK cycles with SWDIOTMS=1. This ensures that both SWD and JTAG are in their reset states.

  • Send the 16-bit JTAG-to-SWD select sequence on SWDIOTMS.

  • Send more than 50 SWCLKTCK cycles with SWDIOTMS=1. This ensures that if SWJ-DP was already in SWD mode, before sending the select sequence, the SWD goes to line reset.

  • Perform a READID to validate that SWJ-DP has switched to SWD operation.

The 16-bit JTAG-to-SWD select sequence is defined to be 0111100111100111, MSB first. This can be represented as 16'h79E7 transmitted MSB first or 16'hE79E when transmitted LSB first.

This sequence has been chosen to ensure that the SWJ-DP switches to using SWD whether it was previously expecting JTAG or SWD. As long as the more than 50 SWDIOTMS=1 sequence is sent first, the JTAG-to-SWD select sequence is benign to SW-DP. It is also benign to SWD and JTAG protocols used in the SWJ-DP and any other TAP controllers that might be connected to SWDIOTMS.

SWD to JTAG switching

To switch SWJ-DP from SWD to JTAG operation:

  • Send more than 50 SWCLKTCK cycles with SWDIOTMS=1. This ensures that both SWD and JTAG are in their reset states.

  • Send the 16-bit SWD-to-JTAG select sequence on SWDIOTMS.

  • Send at least 5 SWCLKTCK cycles with SWDIOTMS=1. This ensures that if SWJ-DP was already in JTAG mode before sending the select sequence, that JTAG goes into the TLR state.

  • Set the JTAG-DP IR to READID and shift out the DR to read the ID.

The 16-bit SWD-to-JTAG select sequence is defined to be 0011110011100111, MSB first. This can be represented as 16'h3CE7 transmitted MSB first or 16'hE73C when transmitted LSB first.

This sequence has been chosen to ensure that the SWJ-DP switches to using JTAG whether it was previously expecting JTAG or SWD. If the SWDIOTMS=1 sequence is sent first, the SWD-to-JTAG select sequence is benign to SW-DP. It is also benign to SWD and JTAG protocols used in the SWJ-DP and any other TAP controllers that might be connected to SWDIOTMS.

Restriction on switching

It is recommended that when a system is powered up, a debug connection is made, and the mode is selected, either SWD or JTAG, the system remains in this mode throughout the debug session. Switching between modes must not be attempted while any component of the DAP is active.

Attempting to switch between modes while any component of the DAP is active can have unpredictable results. A power-on reset cycle might be required to reset the DAP before switching can be retried. If you do not require nTRST for the JTAG interface it must be tied unasserted to 1.

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