Table 4.2 shows how priority affects when and how the processor takes an exception. It lists the actions an exception can take based on priority.
A pended exception can interrupt the current execution thread if the priority of the pended exception is higher than the current execution priority.
When one exception pre-empts another, the exceptions are nested.
On exception entry the processor automatically saves processor state, which is pushed on to the stack. The vector corresponding to the exception is fetched. Execution begins at the address pointed to by the vector table value. Execution of the first instruction of the exception starts when the processor state has been saved. The state saving is performed over the ITCM, DTCM, or external AHB-Lite interface depending on:
The vector fetch is performed over the external AHB-Lite interface or the ITCM memory interface depending on the configuration of ITCM size.
When a valid return instruction is executed, the processor pops the stack and returns to a stacked exception or Thread mode.
On completion of an exception handler the processor automatically restores the processor state by popping the stack to restore the state prior to the exception.
A mechanism used by the processor to speed up pre-emption. If a higher priority exception arrives during state saving for a previous pre-emption, the processor switches to handling the higher priority exception instead and initiates the vector fetch for that exception. The state saving is not affected by late arrival, because the state that is saved is the same for both exceptions and the state saving continues uninterrupted. Late arriving exceptions are recognized up to the point where the vector fetch has been initiated. If a high priority exception is recognized too late to be handled as a late arrival, it is pended and subsequently pre-empts the original exception handler.
In the processor exception model, priority determines when and how the processor takes exceptions. You can assign priority levels to interrupts.