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4.3.1. Priority levels

The NVIC supports software-assigned priority levels. You can assign a priority level from 0 to 3 to an interrupt by writing to the two-bit IP_N field in an Interrupt Priority Register, see Interrupt Priority Registers. Priority level 0 is the highest priority level and priority level 3 is the lowest. For example, if you assign priority level 1 to IRQ[0] and priority level 0 to IRQ[31], then IRQ[31] has priority over IRQ[0].

Note

Software prioritization does not affect reset, Non-Maskable Interrupt (NMI), and Hard Fault. They always have higher priority than the external interrupts.

When multiple exceptions have the same priority number, the pending exception with the lowest exception number takes precedence. For example, if both IRQ[0] and IRQ[1] are priority level 1, then IRQ[0] has precedence over IRQ[1].

An exception is pre-empted if the handler receives an exception that has a higher priority. If the handler receives an interrupt of the same priority the exception is not pre-empted, irrespective of the interrupt number.

For more information on the IP_N fields, see Interrupt Priority Registers.

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