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9.1. About the DAP

When debug is implemented, the processor also contains an Advanced High-performance Bus Access Port (AHB-AP) interface for debug accesses.

External DP components access this AHB-AP interface. The Cortex-M1 system supports three possible DP implementations:

  • Serial Wire JTAG Debug Port (SWJ-DP). This is a standard CoreSight debug port that combines JTAG-DP and the Serial Wire Debug Port (SW-DP) and allows switching between Serial Wire and JTAG.

  • Only SW-DP, through configuration options.

  • Only JTAG-DP, through configuration options

The DP and AP together are referred to as the Debug Access Port (DAP).

Figure 9.1 shows the DAP configuration.

Figure 9.1. DAP configuration

Figure 9.1. DAP configuration

For additional information about the DP components, see the CoreSight Components Technical Reference Manual.

For more information on the AHB-AP, see AHB-AP.

Note

If your implementation of the DAP does not include both JTAG-DP and SW-DP, you cannot switch between them.

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