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9.2.3. Debug access to TCMs

  • Only use a debugger to write to TCMs when the core is halted.

  • Although a debugger can perform debug accesses to TCM when the core is running, some FPGA RAM implementations might have unpredictable results when a read and write occur simultaneously to the same location. If this is the case, you must ensure logic is included to prevent accesses occurring simultaneously.

The core of the processor has a single address for each TCM for both reads and writes to enable a non-debug processor to use single-ported RAMs. You can use dual-port RAMs for TCMs to enable programming before the core of the processor is removed from reset and to facilitate debug removal.

For information on TCM sizes, see Table 10.3.

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