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3.1. About the memory map

Figure 3.1 shows the fixed memory map.

Figure 3.1. Processor memory map

Figure 3.1. Processor memory map

Table 3.1 shows the permissions of the processor memory regions.

Processor memory regions
RegionNameDevice typeXN[1]Interface accessed

0x00000000- 0x000FFFFF

Code, ITCM, Lower AliasNormal-If the ITCM Lower Alias is enabled, instruction fetches and data accesses are performed to ITCM. Data accesses include data literal accesses. The region shown here is for the maximum supported size of ITCM. If there is less ITCM, this region ends at a lower address and the next starts at the following address.

0x00100000- 0x0FFFFFFF

Code, externalNormal-Instruction fetches and data accesses are performed to the external system bus. Data accesses include data literal accesses.

0x10000000- 0x1000FFFF

Code, ITCM, Upper AliasNormal-If the ITCM Upper Alias is enabled, instruction fetches and data accesses are performed to ITCM. Data accesses include data literal accesses. The region shown here is for the maximum supported size of ITCM. If there is less ITCM, this region ends at a lower address and the next starts at the following address.

0x10010000- 0x1FFFFFFF

Code, externalNormal-Instruction fetches and data accesses are performed to the external system bus. Data accesses include data literal accesses.

0x20000000- 0x200FFFFF

SRAM, DTCMNormalXNInstruction fetches are faulted. Data accesses are performed to DTCM. The region shown here is for the maximum supported size of DTCM. If there is less DTCM, this region ends at a lower address and the next starts at the following address.

0x20100000- 0x3FFFFFFF

SRAM, externalNormal-Instruction fetches are performed to the external system bus. Data accesses are performed to the external system bus.

0x40000000- 0x5FFFFFFF

PeripheralDeviceXNData accesses are performed to the external system bus. Instruction accesses are prevented and faulted.

0x60000000- 0x9FFFFFFF

SRAMNormal-Instruction and Data accesses are performed to the external system bus.

0xA0000000- 0xDFFFFFFF

External DeviceDeviceXNData accesses are performed to the external system bus. Instruction accesses are prevented and faulted.

0xE0000000- 0xE00FFFFF

Private Peripheral BusSOXNData accesses are performed over the PPB. Instruction accesses are prevented and faulted.

0xE0100000- 0xFFFFFFFF

System-XNSystem segment. Instruction accesses are prevented and faulted. For data fetches, the region is reserved.

[1] Execute Never. A region is marked as XN to prevent instructions being fetched from that region.

See Chapter 10 External and Memory Interfaces for a description of the processor bus interfaces. See Chapter 8 Debug for information on ROM memory.

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