This book is organized into the following chapters:
- Chapter 1 Introduction
Read this for an introduction to MBIST technology.
- Chapter 2 Functional Description
Read this for a description of the Cortex-A9 processor interface to the MBIST controller and MBIST testing of the data RAM and tag RAMs. Also read this chapter for a description of the timing sequences for loading MBIST instructions, starting the MBIST test, detecting failures, and retrieving the data log.
- Chapter 3 MBIST Instruction Register
Read this for a description on how to use the MBIST Instruction Register to configure the mode of operation of the MBIST engine.
- Chapter 4 MBIST Datalog Register
Read this for a description of the MBIST Datalog Register.
- Appendix A Signal Descriptions
Read this for a description of the MBIST controller input and output signals.
- Appendix B Revisions
Read this for a description of the technical changes between released issues of this book.