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Appendix B. Revisions

This appendix describes the technical changes between released issues of this book.

Table B.1. Differences between issue A and issue B
ChangeLocationAffects
Modified the block SMC and Flash memory

Figure 1.1

r0p0
Added Timing Closure options

Features of the TZASC

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Removed figures in Chapter 2 Functional Description

Chapter 2 Functional Description

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Added AXI slave interface attributes for Read acceptance capability, and Write acceptance capability

Table 2.1

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Modified the AXI master interface attribute values to show that issuing capabilities are configurable

Table 2.2

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Added a functional operation block diagram of TZASC

Figure 2.2

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Added an example to describe the configuration for subregion disable

Subregion disable

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Combined two sections because both the sections related to region security programming

Region security permissions

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Added an example for Memory map and the register programming

Table 2.5

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Removed Tracking Queue description from the bookFunctional operationr0p0
Renamed the PrimeCell Identification Register as Component Identification Register

Table 3.1, and Component Identification Registers

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Renamed the Region Attribute Size <n> Register as Region Attributes <n> Register

Table 3.1, and Region Attributes <n> Register

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Replaced the apb_clken signal with pclken

Table A.1

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Added a note about APB signals

APB signals

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Removed the table for Scan test Appendix A Signal Descriptionsr0p0

Table B.2. Differences between issue B and issue C
ChangeLocationAffects
Added a note about Lockdown Range RegisterLockdown Range Registerr0p1
Modified the reset value for periph_id_[3:0]Table 3.1r0p1
Changed 0x0 to 0x1 for bits [7:4] in Peripheral Identification Register 2Table 3.20r0p1

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