The STM might be required to flush its buffers, that is, output all buffered trace as soon as possible, in the following situations:
A flush request is made over ATB using the AFVALID signal. The STM continues to accept new stimulus writes. The flush is complete when all trace generated before the flush request is output.
The STM is disabled by reprogramming the STMTCSR.EN bit with b0. The STM drops new stimulus until it is enabled again.
When auto-flush is enabled.
When authentication is removed.
When a flush is requested, the STM continues outputting trace as 32-bit ATB writes as normal. However, if insufficient nibbles remain in the buffer for a 32-bit write, the STM does not wait . The most appropriate write size is chosen, and the buffer contents are padded with NULL nibbles for the ATB write.
These features are present to address non-typical usage cases. In a typical trace scenario, do not enable these features, that is, leave the STMAUXCR at its reset value.
The STMAUXCR is implementation defined. Controls defined in this register are not defined in the System Trace Macrocell Programmers’ Model Architecture Specification. There is no guarantee that other implementations of the architecture have the same controls in the STMAUXCR.
The following sections describe buffer flushing: