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3.4.60. Component Identification Registers

The TRCCIDR0-3 characteristics are:


Identifies the ETM as a CoreSight component. For more information, see the Embedded Trace Macrocell Architecture Specification ETMv4.

Usage constraints

Only bits[7:0] of each register are used. This means that TRCCIDR0-3 define a single 32-bit Component ID, as Figure 3.68 shows.


Available in all configurations.


See the register summary in Table 3.1 and Table 3.11.

Figure 3.68 shows the mapping between TRCCIDR0-3 and the single 64-bit Component ID value.

Figure 3.68. Mapping between TRCCIDR0-3 and the Component ID value

Figure 3.68. Mapping between TRCCIDR0-3 and the Component ID value

Table 3.78 shows the Component ID bit assignments in the single conceptual Component ID register.

Table 3.78. TRCCIDR0-3 bit assignments
RegisterRegister numberRegister offsetBitsValueDescription
TRCCIDR30x3FF0xFFC[31:8]-Unused, read undefined.
   [7:0]0xB1Component identifier, bits [31:24].
TRCCIDR20x3FE0xFF8[31:8]-Unused, read undefined.
   [7:0]0x05Component identifier, bits [23:16].
TRCCIDR10x3FD0xFF4[31:8]-Unused, read undefined.
   [7:4]0x9Component class (component identifier, bits [15:12]).
   [3:0]0x0Component identifier, bits [11:8].
TRCCIDR00x3FC0xFF0[31:8]-Unused, read undefined.
   [7:0]0x0DComponent identifier, bits [7:0].

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