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3.4.21. Sequencer Reset Control Register

The TRCSEQRSTEVR characteristics are:


Resets the sequencer to state 0.

Usage constraints

Can only be written when the ETM-R7 is disabled.


Available in all configurations.


See the register summary in Table 3.1 and Table 3.4.

Figure 3.22 shows the TRCSEQRSTEVR bit assignments.

Figure 3.22. TRCSEQRSTEVR bit assignments

Figure 3.22. TRCSEQRSTEVR bit assignments

Table 3.32 shows the TRCSEQRSTEVR bit assignments.

Table 3.32. TRCSEQRSTEVR bit assignments

Selects the resource type to move back to state 0:


Single selected resource.


Boolean combined resource pair.


Selects the resource number, based on the value of RESETTYPE:

When RESETTYPE is 0, selects a single selected resource from 0-15 defined by bits[3:0].

When RESETTYPE is 1, selects a Boolean combined resource pair from 0-7 defined by bits[2:0].

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