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2.2. Interfaces

The ETM-R7 has the following interfaces:

ATB

Two ATB interfaces, one 32 bits and one 64 bits wide, used for trace output from the macrocell. These interfaces have handshaking signals that indicate when trace data is valid and when the receiving component is ready to accept data. There are also signals to request and acknowledge a flush of the trace information and to indicate when a trigger condition has occurred.

See the AMBA 3 ATB Protocol Specification for more information about these interfaces.

APB

An APB interface that provides access to the programmable registers in the ETM-R7 and connects to the system Debug APB. This interface is used to configure the ETM-R7 for a trace session.

See the AMBA 3 APB Protocol Specification for more information about this interface.

Processor trace

The Cortex-R7 MPCore processor passes its execution information to the ETM-R7 over the processor trace interface. This interface provides both instruction and data execution history and contains address, data, and control information. The information carried on the control bus includes:

  • The number of instructions executed in the same cycle.

  • Changes in program flow.

  • The current processor instruction state.

  • The addresses of memory locations accessed by load and store instructions.

  • The data values transferred by load and store instructions.

  • The type, direction, and size of a transfer.

  • Condition code information.

  • Exception information.

  • Current context ID.

There is also a context ID bus that indicates the current context ID value of the processor.

This interface also includes:

  • The ETMEVENT bus. See CPU PMU connectivity.

  • Wait for interrupt state information signals.

  • A signal from the ETM to power up the interface.

Miscellaneous

The ETM-R7 has other interface signals that:

  • Configure the ETM. See Configurable options.

  • Input and output external resource information that controls triggering and filtering of the trace stream.

  • Control which core is enabled, as the trace source, on the processor trace interface of the ETM.

  • Enable invasive and non-invasive debug.

Test

This interface contains the scan enable signal used in production testing of the ETM-R7.

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