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3.4.7. Event Control 1 Register

The TRCEVENTCTL1R characteristics are:

Purpose

Controls the how the events selected by TRCEVENTCTL0R behave. See Event Control 0 Register.

Usage constraints

There are no usage constraints.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1 and Table 3.2.

Figure 3.8 shows the TRCEVENTCTL1R bit assignments.

Figure 3.8. TRCEVENTCTL1R bit assignments

Figure 3.8. TRCEVENTCTL1R bit assignments

Table 3.18 shows the TRCEVENTCTL1R bit assignments.

Table 3.18. TRCEVENTCTL1R bit assignments
BitsNameFunction
[31:13]-RAZ/WI
[12]LPOVERRIDE

Low power state behavior override:

0

Low power state behavior unaffected.

1

Low power state behavior overridden. The resources and Event trace generation are unaffected by entry to a low power state.

[11]ATB

ATB trigger enable:

0

ATB trigger disabled.

1

ATB trigger enabled.

[10:5]-RAZ/WI
[4]DATAEN

Enables generation of an event element in the data trace stream when the selected event occurs:

0

Event does not cause an event element.

1

Event causes an event element.

[3:0]EN

One bit per event, to enable generation of an event element in the instruction trace stream when the selected event occurs:

0

Event does not cause an event element.

1

Event causes an event element.


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