You copied the Doc URL to your clipboard.

3.4.42. Power Down Status Register

The TRCPDSR characteristics are:

Purpose

Indicates the power down status of the ETM-R7.

Usage constraints

There are no usage constraints.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1 and Table 3.8.

Figure 3.48 shows the TRCPDSR bit assignments.

Figure 3.48. TRCPDSR bit assignments

Figure 3.48. TRCPDSR bit assignments

Table 3.59 shows the TRCPDSR bit assignments.

Table 3.59. TRCPDSR bit assignments
BitsNameFunction
[31:6]-RAZ/WI
[5]OSLKOS lock status.
[4:2]-RAZ/WI
[1]STICKYPD

Sticky power down state.

0

Trace register power has not been removed since the TRCPDSR was last read.

1

Trace register power has been removed since the TRCPDSR was last read.

This bit is set to 1 when power to the ETM-R7 registers is removed, to indicate that programming state has been lost. It is cleared after a read of the TRCPDSR.

[0]POWER

Indicates the ETM-R7 is powered:

1

ETM-R7 is powered. All registers are accessible.

If a system implementation allows the ETM to be powered off independently of the debug power domain, the system must handle accesses to the ETM appropriately.


Was this page helpful? Yes No