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3.4.1. Programming Control Register

The TRCPRGCTLR characteristics are:

Purpose

Enables the ETM-R7.

Usage constraints
Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1 and Table 3.2.

Figure 3.2 shows the TRCPRGCTLR bit assignments.

Figure 3.2. TRCPRGCTLR bit assignments

Figure 3.2. TRCPRGCTLR bit assignments

Table 3.12 shows the TRCPRGCTLR bit assignments.

Table 3.12. TRCPRGCTLR bit assignments
BitsNameFunction
[31:1]-RAZ/WI
[0]EN

Trace program enable:

0

The external pin ETMIFEN is LOW, and clocks are only enabled when necessary to process APB accesses, or drain any already generated trace. Writes to most registers are ignored. This is the reset value.

1

The external pin ETMIFEN is HIGH, and clocks are enabled except for when the CPUACTIVE input is deasserted and all trace has been drained.


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