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3.4.15. ViewInst Include/Exclude Control Register

The TRCVIIECTLR characteristics are:

Purpose

Defines the address range comparators that control the ViewInst Include/Exclude control.

Usage constraints

Can only be written when the ETM-R7 is disabled.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1 and Table 3.3.

Figure 3.16 shows the TRCVIIECTLR bit assignments.

Figure 3.16. TRCVIIECTLR bit assignments

Figure 3.16. TRCVIIECTLR bit assignments

Table 3.26 shows the TRCVIIECTLR bit assignments.

Table 3.26. TRCVIIECTLR bit assignments
BitsNameFunction
[31:20]-RAZ/WI
[19:16]EXCLUDEDefines the address range comparators for ViewInst exclude control. One bit is provided for each implemented Address Range Comparator.
[15:4]-RAZ/WI
[3:0]INCLUDE

Defines the address range comparators for ViewInst include control.

Selecting no include comparators indicates that all instructions must be included. The exclude control indicates which ranges must be excluded.

One bit is provided for each implemented Address Range Comparator.


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