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3.3.1. Functional grouping of registers

This section shows the macrocell registers by functional group, as follows:

These functional groups include all of the registers.

General control and ID registers

Table 3.2 shows the general control and ID registers in numerical order.

Table 3.2. General control and ID registers
Register numberNameBase offsetDescription
1TRCPRGCTLR0x004Programming Control Register
2TRCPROCSELR0x008Processor Select Control Register
3TRCSTATR0x00CStatus Register
4TRCCONFIGR0x010Trace Configuration Register
6TRCAUXCTLR0x018Auxiliary Control Register
8TRCEVENTCTL0R0x020Event Control 0 Register
9TRCEVENTCTL1R0x024Event Control 1 Register
11TRCSTALLCTLR0x02CStall Control Register
12TRCTSCTLR0x030Global Timestamp Control Register
13TRCSYNCPR0x034Synchronization Period Register
14TRCCCCTLR0x038Cycle Count Control Register
15TRCBBCTLR0x03CBranch Broadcast Control Register
16TRCTRACEIDR0x040Trace ID Register

Trace filtering control registers

Table 3.3 shows the trace filtering control registers in numerical order.

Table 3.3. Trace filtering control registers
Register numberNameBase offsetDescription
32TRCVICTLR0x080ViewInst Main Control Register
33TRCVIIECTLR0x084ViewInst Include/Exclude Control Register
34TRCVISSCTLR0x088ViewInst Start/Stop Control Register
40TRCVDCTLR0x0A0ViewData Main Control Register
41TRCVDSACCTLR0x0A4ViewData Include/Exclude Single Address Comparator Register
42TRCVDARCCTLR0x0A8ViewData Include/Exclude Address Range Comparator Register

Derived resource registers

Table 3.4 shows the derived resource registers in numerical order. These registers control:

  • The two counters, and associated events.

  • The sequencer, and associated state change events.

  • Trigger events.

  • EXTOUT (External Output) events.

  • Extended External Input selection.

Table 3.4. Derived resource registers
Register numberNameBase offsetDescription
64-66TRCSEQVRn0x100-0x108Sequencer State Transition Control Registers 0-2
70TRCSEQRSTEVR0x118Sequencer Reset Control Register
71TRCSEQSTR0x11CSequencer State Register
72TRCEXTINSELR0x120External Input Select Register
80-81TRCCNTRLDVRn0x140-0x144Counter Reload Value Registers 0-1
84TRCCNTCTLR00x150Counter Control Register 0
85TRCCNTCTLR10x154Counter Control Register 1
88-89TRCCNTVRn0x160-0x164Counter Value Registers 0-1

Implementation-specific and identification registers

Table 3.5 shows the implementation-specific and identification registers in numerical order.

Table 3.5. Implementation-specific and identification registers
Register numberNameBase offsetDescription
96TRCIDR80x180ID Register 8-13
97TRCIDR90x184
98TRCIDR100x188
99TRCIDR110x18C
100TRCIDR120x190
101TRCIDR130x194
112TRCIMSPEC00x1C0Implementation Specific Register 0
120TRCIDR00x1E0ID Register 0
121TRCIDR10x1E4ID Register 1
122TRCIDR20x1E8ID Register 2
123TRCIDR30x1ECID Register 3
124TRCIDR40x1F0ID Register 4
125TRCIDR50x1F4ID Register 5

Resource selection registers

Table 3.6 shows the resource selection registers in numerical order.

Table 3.6. Resource selection registers
Register numberNameBase offsetDescription
130-140TRCRSCTLRn0x208-0x240Resource Selection Registers 2-16

Single-Shot comparator registers

Table 3.7 shows the Single-Shot comparator registers in numerical order.

Table 3.7. Single-Shot Comparator registers
Register numberNameBase offsetDescription
160-161TRCSSCCRn0x280-0x284Single-Shot Comparator Control Registers 0-1
168-169TRCSSCSRn0x2A0-0x2A4Single-Shot Comparator Status Registers 0-1

OS lock and power control registers

Table 3.8 shows the OS lock and power control registers in numerical order.

Table 3.8. OS lock and power control registers
Register numberNameBase offsetDescription
192TRCOSLAR0x300OS Lock Access Register
193TRCOSLSR0x304OS Lock Status Register
196TRCPDCR0x310Power Down Control Register
197TRCPDSR0x314Power Down Status Register

Comparator registers

Table 3.9 shows the comparator registers in numerical order.

Table 3.9. Comparator registers
Register numberNameBase offsetDescription
256-271TRCACVRn0x400-0x43CAddress Comparator Value Registers 0-7
288-303TRCACATRn0x480-0x4BCAddress Comparator Access Type Registers 0-7
320-321TRCDVCVRn0x500-0x504Data Value Comparator Value Registers 0-1
352-359TRCDVCMRn0x580-0x59CData Value Comparator Mask Registers 0-1
384TRCCIDCVR00x600Context ID Comparator Value Register 0

Integration Test registers

Table 3.10 shows the Integration Test registers in numerical order.

Table 3.10. Integration Test registers
Register numberNameBase offsetDescription
951Integration Miscellaneous Outputs Register0xEDCIntegration Miscellaneous Outputs Register
952Integration Miscellaneous Inputs Register0xEE0Integration Miscellaneous Inputs Register
953Integration ATB Identification Register0xEE4Integration ATB Identification Register
954Integration Data ATB Data Register0xEE8Integration Data ATB Data Register
955Integration Instruction ATB Data Register0xEECIntegration Instruction ATB Data Register
956Integration Data ATB In Register0xEF0Integration Data ATB In Register
957Integration Instruction ATB In Register0xEF4Integration Instruction ATB In Register
958Integration Data ATB Out Register0xEF8Integration Data ATB Out Register
959Integration Instruction ATB Out Register0xEFCIntegration Instruction ATB Out Register

CoreSight management registers

Table 3.11 shows the CoreSight management registers in numerical order.

Table 3.11. CoreSight management registers
Register numberNameBase offsetDescription
960TRCITCTRL0xF00 Integration Mode Control Register
1000TRCCLAIMSET0xFA0 Claim Tag Set Register
1001TRCCLAIMCLR0xFA4 Claim Tag Clear Register
1002TRCDEVAFF00xFA8 Device Affinity Register
1004TRCLAR0xFB0 Software Lock Access Register
1005TRCLSR0xFB4 Software Lock Status Register
1006TRCAUTHSTATUS 0xFB8 Authentication Status Register
1007TRCDEVARCH0xFBC Device Architecture Register
1010TRCDEVID0xFC8 Device ID Register
1011TRCDEVTYPE0xFCC Device Type Register
1012-1019TRCPIDRn

0xFD0-0xFEC

Peripheral Identification Registers
1020-1023TRCCIDRn

0xFF0-0xFFC

Component Identification Registers

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