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A.3. Processor trace interface

Table A.3 shows the trace interface signals from the Cortex-R7 MPCore processor.

Table A.3. Processor trace interface signals
Signal nameTypeSource/destinationDescription
ETMBUS[321:0]InputProcessorCombined ETM interface channel.
ETMIFVALID InputCore active, interface stable.
ETMIFEN OutputPower control for processor ETM interface.
ETMBACK OutputConfigurable output to stall processor.
DBGACK InputProcessor is in debug state.
CPUACTIVE InputProcessor is not in WFI/WFE or other low power state.

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