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3.3.37. Device Configuration Register

The DEVID Register characteristics are:

Purpose

Indicates the capabilities of the CoreSight TMC.

Configurations

Present in all configurations.

Figure 3.37 shows the DEVID Register bit assignments.

Figure 3.37. DEVID Register bit assignments

Figure 3.37. DEVID Register bit assignments

Table 3.38 shows the DEVID Register bit assignments.

Table 3.38. DEVID Register bit assignments
BitsNameFunction
[31:14]Reserved

Reserved.

[13:11]WBUF_DEPTH

In the ETR configuration, this value indicates, in powers of two, the number of entries in the Write buffer. Each entry is of size ATB_DATA_WIDTH.

0x2

Depth of the Write buffer is 4 entries.

0x3

Depth of the Write buffer is 8 entries.

0x4

Depth of the Write buffer is 16 entries.

0x5

Depth of the Write buffer is 32 entries.

[10:8]MEMWIDTH

This value indicates the width of the Memory interface databus.

For the ETB and ETF configurations, you have chose this value that is twice the ATB datawidth. In these configurations, the default value of MEMWIDTH is 64 bits, corresponding to the default ATB datawidth of 32 bits.

For the ETR configuration, the MEMWIDTH is the same as the ATB datawidth, the default value being 32 bits.

0x2

Memory interface databus is 32 bits wide.

0x3

Memory interface databus is 64 bits wide.

0x4

Memory interface databus is 128 bits wide.

0x5

Memory interface databus is 256 bits wide.

[7:6]CONFIGTYPE

This value indicates TMC configuration types.

0x0

ETB.

0x1

ETR.

0x2

ETF.

[5]CLKSCHEME

This value indicates the TMC RAM clocking scheme used. That is, whether the TMC RAM operates synchronously or asynchronously to CLK.

0x0

The TMC RAM operates synchronously to CLK.

[4:0]ATBINPORTCOUNT

This value indicates the type or number of ATB multiplexing that is available on the input ATB. Currently, only 0x00 is supported. This value is used to assist topology detection of the ATB structure.

0x0

Currently, only 0x00 is supported, and no multiplexing is available.


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