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3.3.24. Integration Test ATB Master Interface Control 0 Register

The ITATBMCTR0 Register characteristics are:

Purpose

Enables control of the ATBYTESM, AFREADYM, and ATVALIDM outputs of the TMC.

Writing to this register other than when in Disabled state and in integration mode results in Unpredictable behavior.

Configurations

Present in ETR configuration only.

Figure 3.24 shows the ITATBMCTR0 Register bit assignments.

Figure 3.24. ITATBMCTR0 Register bit assignments

Figure 3.24. ITATBMCTR0 Register bit assignments

Table 3.25 shows the ITATBMCTR0 Register bit assignments.

Table 3.25. ITATBMCTR0 Register bit assignments
BitsNameFunction
[31:12]Reserved

Reserved.

[11:8]ATBYTESM[a]

Control the value of ATBYTESM output from TMC. The value written to this field is driven on the ATBYTESM output of the TMC.

[7:2]ReservedReserved.
[1]AFREADYM

Set the value of AFREADYM output.

0

Drive logic 0 on AFREADYM output.

1

Drive logic 1 on AFREADYM output.

[0]ATVALIDM

Set the value of ATVALIDM output.

0

Drive logic 0 on ATVALIDM output.

1

Drive logic 1 on ATVALIDM output.

[a] The width of the ATBYTES field depends on the configuration:

[9:8]

For 32-bit configurations.

[10:8]

For 64-bit configurations.

[11:8]

For 128-bit configurations.


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