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The LAR Register characteristics are:
- Purpose
Enables write access to device registers.
External accesses from a debugger, PADDRDBG31 = 1, are not subject to the Lock registers. A debugger does not have to unlock the component to write and modify the registers in the component.
- Configurations
Present in all configurations.
Figure 3.34 shows the LAR Register bit assignments.
Table 3.35 shows the LAR Register bit assignments.
Bits | Name | Function |
---|---|---|
[31:0] | ACCESS_W | A write of |