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3.4.1. DCC_CFGx registers

The DCC_CFGx registers characteristics are:


These registers write the USER configuration value. You can define up to 64 write registers. The register address must be in increments of 0x004, and the data must be 32-bits wide. The MCC reads the daughterboard configuration file during board configuration and writes the register values to the FPGA SCC registers. You must implement the appropriate decoder and logic in the FPGA for these to have any effect.

Usage constraints

There are no usage constraints.


Available in all LogicTile Express 20MG configurations.


Table 3.1.

Figure 3.1 shows the bit assignments.

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Table 3.2 shows the bit assignments.

Table 3.2. DCC_CFGx Registers bit assignments
Bits Name Function
[31:0] DCC_CFGx[31:0] User registers configured during board initialization up from configuration file


You can also update the DCC_CFGx registers during run-time through the motherboard SYS_CFG register interface, or motherboard serial port command line interface or SCC APB interface.

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