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A.1.4. Trace connector

The V2F-1XV7 daughterboard provides one MICTOR trace connector, J17, labeled Trace. The connector supports 16-bit trace and provides access to a Trace Port Interface Unit (TPIU) that can be implemented in the FPGA.

Note

Examples of trace modules that can be used are RealView ICE and RealView Trace 2.

Figure A.3 shows the MICTOR connector, part number AMP 2-5767004-2.

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Table A.1 shows the trace pin mapping for each Trace signal. the an306_revb.xdc constraints file, available in Application Note 306 Example LogicTile Express 20MG Design for a CoreTile Express A9x4, for FPGA mapping.

Table A.1. Trace dual connector, J17, signal list
Pin Signal Pin Signal
1 Not connected 2 Not connected
3 Not connected 4 Not connected
5 GND 6 TRACECLKA
7 TRACEDBGRQ 8 TRACEDBGACK
9 nSRST 10 TRACEEXTTRIGX
11 TDO 12 VTREFA, 1V5
13 RTCK 14 VSUPPYLYA
15 TCK 16 TRACEDATA7
17 TMS 18 TRACEDATA6
19 TDI 20 TRACEDATA5
21 nTRST 22 TRACEDATA4
23 TRACEDATA15 24 TRACEDATA3
25 TRACEDATA14 26 TRACEDATA2
27 TRACEDATA13 28 TRACEDATA1
29 TRACEDATA12 30 GND
31 TRACEDATA11 32 GND
33 TRACEDATA10 34 VTREFA, 1V5
35 TRACEDATA9 36 TRACECTL
37 TRACEDATA8 38 TRACEDATA0

Note

The V2F-1XV7 daughterboard does not support adaptive clocking. The RTCK signal is tied LOW on the trace connector.

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