The DCC_AID Register characteristics are:
The Daughterboard Configuration Controller reads this information and uses it to determine the number of DCC_CFGx registers, and the registers that are supported that can be read from the motherboard SYS-CFG register interface. If this register is not implemented, the Daughterboard Configuration Controller does not support user switches or LEDs, lock, or
If a SCC interface is not implemented in the FPGAs, the FPGA CFGDATAOUT signal must be pulled to a logic LOW to signal to the Daughterboard Configuration Controller that no data is transferred.
- Usage constraints
There are no usage constraints.
Available in all LogicTile Express 20MG configurations.
Figure 3.5 shows the bit assignments.
Table 3.6 shows the bit assignments.
|[31:24]||Build||FPGA build number.|
|||SW_ENABLE||This bit indicates whether the DCC_SW_READ command is supported.|
|||LED_ENABLE||This bit indicates whether the DCC_LED_READ command is supported.|
|||LOCK_ENABLE||This bit indicates whether the DCC_LOCK_READ command is supported.|
|[7:0]||CFGREGNUM||These bits indicate the number of user config commands. The maximum number supported is 64.|