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11.6.3. Debug Device ID Register 1

The DBGDEVID1 characteristics are:

Purpose

Adds to the information given by the DBGDIDR by describing other features of the debug implementation.

Usage constraints

This register is accessible as follows:

EL0

(NS)

EL0

(S)

EL1

(NS)

EL1

(S)

EL2

EL3

(SCR.NS = 1)

EL3

(SCR.NS = 0)

--RORORORORO
Configurations

There is one copy of this register that is used in both Secure and Non-secure states.

Attributes

See the register summary in Table 11.7.

Figure 11.7 shows the DBGDEVID1 bit assignments.

Figure 11.7. DBGDEVID1 bit assignments

Figure 11.7. DBGDEVID1 bit assignments

Table 11.10 shows the DBGDEVID1 bit assignments.

Table 11.10. DBGDEVID1 bit assignments
BitsNameFunction
[31:4]-Reserved, res0.
[3:0]-

Indicates the offset applied to PC samples returned by reads of EDPCSR. The value is:

0x2

EDPCSR samples have no offset applied and do not sample the instruction set state in the AArch32 state.


To access the DBGDEVID1 in AArch32 Execution state, read the CP14 register with:

MRC p14, 0, <Rt>, c7, c1, 47 Read Debug Device ID Register 1
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