The DBGDIDR characteristics are:
The version of the Debug architecture that is implemented.
Some features of the debug implementation.
- Usage constraints
This register is accessible as follows:
(SCR.NS = 1)
(SCR.NS = 0)
RO RO RO RO RO RO RO
There is one copy of this register that is used in both Secure and Non-secure states.
See the register summary in Table 11.7.
Figure 11.5 shows the DBGDIDR bit assignments.
Table 11.8 shows the DBGDIDR bit assignments.
The number of Watchpoint Register Pairs (WRPs) implemented. The number of implemented WRPs is one more than the value of this field. The value is:
This field has the same value as ID_AA64DFR0_EL1.WRPs.
The number of Breakpoint Register Pairs (BRPs) implemented. The number of implemented BRPs is one more than the value of this field. The value is:
This field has the same value as ID_AA64DFR0_EL1.BRPs.
The number of BRPs that can be used for Context matching. This is one more than the value of this field. The value is:
This field has the same value as ID_AA64DFR0_EL1.CTX_CMPs.
The Debug architecture version.
Secure User Halting Debug not implemented bit. The value is:
EL3 implemented. The value is:
To access the DBGDIDR in AArch32 Execution state, read the CP14 register with:
MRC p14, 0, <Rt>, c0, c0, 0; Read Debug ID Register