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13.8.42. Power Down Control Register

The TRCPDCR characteristics are:


Request to the system power controller to keep the ETM trace unit powered up.

Usage constraints

There are no usage constraints.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.44 shows the TRCPDCR bit assignments.

Figure 13.44. TRCPDCR bit assignments

Figure 13.44. TRCPDCR bit assignments

Table 13.45 shows the TRCPDCR bit assignments.

Table 13.45. TRCPDCR bit assignments
[31:4]-Reserved, res0.

Powerup request, to request that power to the ETM trace unit and access to the trace registers is maintained:


Power not requested.


Power requested.

This bit is reset to 0 on a trace unit reset.

[2:0]-Reserved, res0.

The TRCPDCR can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x310.