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13.8.37. Resource Selection Control Registers 2-16

The TRCRSCTLRn characteristics are:


Controls the trace resources.

There are eight resource pairs, the first pair is predefined as {0,1,pair=0} and having reserved select registers. This leaves seven pairs to be implemented as programmable selectors.

Usage constraints

Accepts writes only when the trace unit is disabled.


Available in all configurations.


See the register summary in Table 13.3.

Figure 13.39 shows the TRCRSCTLRn bit assignments.

Figure 13.39. TRCRSCTLRn bit assignments

Figure 13.39. TRCRSCTLRn bit assignments

Table 13.40 shows the TRCRSCTLRn bit assignments.

Table 13.40. TRCSCTLRn bit assignments

Reserved, res0.


Inverts the result of a combined pair of resources.

This bit is implemented only on the lower register for a pair of resource selectors.


Inverts the selected resources:


Resource is not inverted.


Resource is inverted.


Reserved, res0.


Selects a group of resources. See the ARM® ETM™ Architecture Specification, ETMv4 for more information.


Reserved, res0.


Selects one or more resources from the required group. One bit is provided for each resource from the group.

The TRCRSCTLRn can be accessed through the internal memory-mapped interface and the external debug interface, offset 0x208-023C.