The TRCVICTLR characteristics are:
Controls instruction trace filtering.
- Usage constraints
Accepts writes only when the trace unit is disabled.
Returns stable data only when TRCSTATR.PMSTABLE==1.
Must be programmed, particularly to set the value of the SSSTATUS bit, that sets the state of the start-stop logic.
Available in all configurations.
See the register summary in Table 13.3.
Figure 13.15 shows the TRCVICTLR bit assignments.
Table 13.16 shows the TRCVICTLR bit assignments.
In Non-secure state, each bit controls whether instruction tracing is enabled for the corresponding exception level:
In Secure state, each bit controls whether instruction tracing is enabled for the corresponding exception level:
The exception levels are:
Selects whether a system error exception must always be traced:
Selects whether a reset exception must always be traced:
Indicates the current status of the start/stop logic:
Selects the resource type for the viewinst event:
Selects the resource number to use for the viewinst event, based on the value of TYPE:
When TYPE is 0, selects a single selected resource from 0-15 defined by bits[3:0].
When TYPE is 1, selects a Boolean combined resource pair from 0-7 defined by bits[2:0].
The TRCVICTLR can be accessed through the internal memory-mapped
interface and the external debug interface, offset