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2.1.8. Cache protection

The Cortex-A53 processor supports cache protection in the form of ECC or parity on all RAM instances in the processor using two separate implementation options:

  • SCU-L2 cache protection.

  • CPU cache protection.

These options enable the Cortex-A53 processor to detect and correct a one-bit error in any RAM and detect two-bit errors in some RAMs.

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