You copied the Doc URL to your clipboard.

10.3.2. AArch32 Generic Timer register summary

Table 10.3 shows the AArch32 Generic Timer registers. See the ARM® Architecture Reference Manual ARMv8, for ARMv8-A architecture profile for information about these registers.

Table 10.3. AArch32 Generic Timer registers

Counter-timer Frequency register

CNTPCT-0c14-UNK64-bitCounter-timer Physical Count register
CNTKCTLc140c10-[a]32-bitCounter-timer Kernel Control register
CNTP_TVAL  c20UNK32-bitCounter-timer Physical Timer TimerValue register



Counter-timer Physical Timer Control register

CNTV_TVAL  c30UNK32-bit

Counter-timer Virtual Timer TimerValue register

CNTV_CTL   1[b]32-bit

Counter-timer Virtual Timer Control register


Counter-timer Virtual Count register

CNTP_CVAL 2  UNK64-bitCounter-timer Physical Timer CompareValue register
CNTV_CVAL 3  UNK64-bitCounter-timer Virtual Timer CompareValue register
CNTVOFF 4  UNK64-bit

Counter-timer Virtual Offset register



32-bitCounter-timer Hyp Control register
CNTHP_TVAL  c20UNK32-bit

Counter-timer Hyp Physical Timer TimerValue register

CNTHP_CTL   1[b]32-bitCounter-timer Hyp Physical Timer Control register

Counter-timer Hyp Physical CompareValue register

[a] The reset value for bits[9:8, 2:0] is b00000.

[b] The reset value for bit[0] is 0.

[c] The reset value for bit[2] is 0 and for bits[1:0] is 0b11.

Was this page helpful? Yes No